The present invention relates to a voltage booster system and a semiconductor chip. In particular, the present invention relates to a voltage booster system of a charge pump type and a semiconductor chip.
In a conventional liquid crystal display system, it is necessary to generate a voltage higher than a power source voltage for driving a liquid crystal panel. Accordingly, in a semiconductor integrated circuit constituting a drive circuit of the liquid crystal panel, a conventional voltage booster system of a charge pump type is provided for stepping up the power source voltage.
FIG. 1 is a circuit diagram showing the conventional voltage booster system of the charge pump type. As shown in FIG. 1, the conventional voltage booster system includes a regulator 11′ and a charge pump circuit 12′. The regulator 11′ includes an operation amplifier 15′ for generating and outputting a constant voltage, a power source 14′, and resistors R1′ and R2′.
In the conventional voltage booster system, the operation amplifier 15′ is configured to operate at a power source voltage VDD′. Further, a reference voltage Vref′ of the power source 14′ is applied to a non-inversion input terminal of the operation amplifier 15′. The resistors R1′ and R2′ are connected in series between an output terminal of the operation amplifier 15′ and a reference potential (a ground potential) terminal. The resistors R1′ and R2′ constitute a divider circuit, so that a divided voltage is generated at a connection point between the resistors R1′ and R2′. The divided voltage is applied to an inversion input terminal of the operation amplifier 15′.
As shown in FIG. 1, the charge pump circuit 12′ includes switching elements SW1′ to SW4′ and capacitors C1′ to C3′ connected externally. Further, the charge pump circuit 12′ includes connection terminals A1′ to A4′. The connection terminal A1′ is connected to the output terminal of the operation amplifier 15′.
In the conventional voltage booster system, the switching element SW1′ is connected between the connection terminal A1′ and the connection terminal A3′. The switching element SW2′ is connected between the connection terminal A1′ and the connection terminal A4′. The switching element SW3′ is connected between the connection terminal A2′ and the connection terminal A3′. The switching element SW4′ is connected between the connection terminal A4′ and the reference potential terminal. The capacitor C1′ is connected between the connection terminal A1′ and the reference potential terminal. The capacitor C2′ is connected between the connection terminal A2′ and the reference potential terminal. The capacitor C3′ is connected between the connection terminal A3′ and the connection terminal A4′.
In the conventional voltage booster system, the resistor R1′ and R2′ divide an output voltage VL1′ of the operation amplifier 15′ in the regulator 11′, and the divided voltage is supplied to the inversion input terminal of the operation amplifier 15′. The operation amplifier 15′ is configured to operate such that the divided voltage becomes substantially equal to the reference voltage Vref′ applied to the non-inversion input terminal of the operation amplifier 15′, thereby stabilizing the output voltage VL1′. The output voltage VL1′ is applied to the capacitor C1′ of the charge pump circuit 12′, so that electric charges are accumulated in the capacitor C1′. Accordingly, it is possible to stabilize the output voltage VL1′.
FIG. 2 is a time chart showing an on-off operation of the charge pump circuit 12′ of the conventional voltage booster system. As shown in FIG. 2, the switching elements SW1′ to SW4′ of the charge pump circuit 12 alternately become an on state and an off state.
More specifically, during a period of a first step, the switching elements SW1′ and SW4′ become the on state and the switching elements SW2′ and SW3′ become the off state. On the other hand, during a period of a second step, the switching elements SW1′ and SW4′ become the off state and the switching elements SW2′ and SW3′ become the on state. During the first step and the second step, the output voltage VL1′ of the operation amplifier 15′ is applied to the capacitor C1′.
In the conventional voltage booster system, when the switching elements SW1′ and SW4′ become the on state in the first step, the output voltage VL1′ of the operation amplifier 15′ is applied to the capacitor C3′, so that a pump current flows and electric charges are accumulated in the capacitor C3′. Accordingly, a voltage between both end portions of the capacitor C3′ becomes equal to the output voltage VL1′.
Further, in the conventional voltage booster system, when the switching elements SW1′ and SW4′ become the off state and the switching elements SW2′ and SW3′ become the on state in the second step, a combined voltage of the capacitor C3′ and the capacitor C1′ is applied to the capacitor C2′, so that electric charges of the capacitor C3′ flow into the capacitor C2′. When the first step and the second step are alternately repeated, a voltage VL2′ of the capacitor C2′, that is, the connection terminal A2′, becomes double of the output voltage VL1′.
Patent Reference has disclosed another conventional voltage booster system. In the conventional voltage booster system disclosed in Patent reference, a regulator is disposed on a later stage of the charge pump circuit. Further, switching elements having different levels of on resistivity are arranged in the regulator. When the regulator rises up, the switching element having a higher level of the on resistivity is sequentially turned on. Accordingly, it is possible to prevent a voltage step up through the charge pump circuit from decreasing due to a smooth capacitor.
Patent Reference: Japanese Patent Publication No. 2005-044203
In the conventional voltage booster system, the output terminal of the operation amplifier 15′ is connected to the capacitor C1′ through the connection terminal A1′. Accordingly, immediately after the power source voltage VDD′ is supplied to the operation amplifier 15′, an inrush current flows from the operation amplifier 15′ to the capacitor C1′, so that the capacitor C1′ is charged. Further, immediately after starting the first step, during which the switching elements SW1′ and SW4′ become the on state, an inrush current flows from the operation amplifier 15′ to the capacitor C3′ through the switching element SW1′, so that the capacitor C3′ is charged.
In the conventional voltage booster system, if the power source has a small capacity such as a battery and the like, when the inrush current flows, the power source voltage VDD′ tends to decrease due to the inrush current. When the power source voltage VDD′ decreases, other circuit in the device such as a drive circuit may cause a malfunction.
To this end, similar to the conventional voltage booster system disclosed in Patent reference, transistors having the different levels of the on resistivity may be arranged in the regulator. When the regulator is started, the transistor having a higher level of the on resistivity is sequentially turned on. Accordingly, it is possible to prevent the power source voltage from decreasing due to the charge pump circuit.
However, in this case, it is necessary to supply a current into the charge pump circuit 12′ in the first step to charge the capacitor C3′ shown in FIG. 1. Accordingly, in order to prevent the voltage from decreasing in the operation during the first step, it is necessary to control two transistors of the regulator 11′ every time the capacitor C3′ is charged. As a result, the drive performance of the regulator 11′ tends to lower each time. When there is other circuit utilizing the output voltage of the regulator, the circuit tends to operate unstably.
In view of the problems described above, an object of the present invention is to provide a voltage booster system and a semiconductor chip capable of solving the problems of the conventional voltage booster system. In the present invention, it is possible to stably operate a charge pump circuit even when an output voltage of a regulator is supplied to a circuit other than the charge pump circuit without destabilizing the circuit.
Further objects and advantages of the invention will be apparent from the following description of the invention.